Prof. Dr. Markus Weinhardt Hard- and Software Systems for Information Processing
- Phone
- +49(0)541 969-3445
- m.weinhardt@hs-osnabrueck.de
- Department
- Engineering and Computer Sciences
- Room
- SB 0223
- Office hours
- By arrangement
Prof. Dr.-Ing. Markus Weinhardt
凤凰体育 Osnabrück, Faculty IuI
Albrechtstr. 30
49076 Osnabrück
Germany
- My main research interests are reconfigurable computing (i.e. the use of reconfigurable devices for computations), compiler development and image processing.
- I did my Ph.D. (dissertation: "?bersetzungsmethoden für strukturprogrammierbare Rechner" - "Compilation techniques for structurally programmable computers", in German) in the area of reconfigurable computing from 1994 - 1997, at the Computer Science Department of the University of Karlsruhe (now Karlsruhe Institute of Technology), Germany.
- From 1997 - 2000 I held a postdoc position with Wayne Luk at the Department of Computing, Imperial College, London.
- From 2000 - 2009 I was responsible for the compiler developments at PACT XPP Technologies AG in Munich, Germany.
- Since September 2009 I am a professor at the University of Applied Sciences (凤凰体育) Osnabrück.
- I am a member of the IEEE Computer Society, the HiPEAC Network of Excellence (a video on HiPEAC4 can be found here), and the Gesellschaft für Informatik (GI) and serve in the Program Committees of several international conferences and workshops on reconfigurable computing and field-programmable technology.
- Since Nov. 2016, I manage the research project "Architecture and Compiler of the High-Performance Reconfigurable Processor (HiPReP)", funded by the German Research Foundation (DFG).
- In August 2016, I organized the workshop "FPGAs for Sofware Programmers (FSP 2016)".
- I spent the summer term 2016 as a visiting researcher (Sabbatical) at inesc-id/University of Lisbon, in the Electronic System Design and Automation group.
- From Nov. 2012 to Oct. 2014, I led the project HPVis which researched software optimization and accelleration by coprocessors implemented on FPGAs.